Signal translating device



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June 8, 1965 T. H- BONN ETAL SIGNAL TRANSLATING DEVICE Original Filed Sept. 24, 1953 9 Sheets-Sheet 9 are/r! United States Patent cc 3,188,481 SIGNAL TRANSLATING DEVICE Theodore H Bonn, Merion Station, and John Presper Eckert, Jr., Gladwyne, Pa, assignors to Sperry Rand Corporation, New York, N.Y., a corporation of 1 Delaware Application June 25, 1959, Ser. No. 882,943, new Patent No. 3,041,4 68, dated .Iune 26, 1962, which is a division of application Ser. No. 382,189, Sept. 24, 1953, new Patent No. 2,892,998, dated June '30, 1959. Divided and this application Feb. 8, 1962, Ser. No. 171,961 4 Claims. (Ci. SIN-=88) Thisapplication is a division of our copending application Serial Number 822,943 filed June 25, 1959 now United States Patent No. 3,041,468, which in turn was divided from our application Serial Number 382,180 filed September 24, 1953, now United States Patent No. 2,892,998.

The invention disclosed herein relates to bistable devices and is particularly concerned with such devices in the nature of flip-flops utilizing magnetic amplifiers.

As is well-known, one of the basic components used in computing machines is the bistable device known as a flip-flop. Such devices may be conveniently used for the storage of binary information (i.e. a 1 or 0 bit) and are more generally employed to store either the occurrence of a first or second condition, wherein the indicia of the condition to be stored by the flip-flop is transitory. Flip-flops are said to have two stable states; one indicating the occurrence of the first condition and the other indicating the presence of the second condition. It should be noted that once the flip-flop indicates a given condition (e.g. the presence of a 1 bits) a future occurrence of the same condition will have no effect on the flip-flop. Only the occurrence of the other condition (e.g. the presence of a 0 bit) will cause the flip-flop to change state.

In the past, such bistable devices have normally been constructed in the form of vacuum tube circuitry, and while such circuitry is usually acceptable, it does have several disadvantages. First, the use of vacuum tubes results in a circuit unit which is relatively large in size, thereby making disposition of components within an overall installation rather difficult. Second, vacuum tubes are subject to breakage and as a result circuits utilizing such vacuum tubes are often relatively fragile. Again, in'the normal course of operation vacuum tubes are subject to normal operating failures, thus raising serious questions of maintenance and the cost attendant thereto. 7 In order to reduce failures due to the foregoing difliculties, other forms of electrical devices have been suggestedfor use in bistable circuits. One such other form is the magnetic amplifier and it is with this particular type of bistable device that the present invention is primarily concerned.

Several flip-flop circuits employing magnetic amplifiers are shown and described in the body of this specification. Generally, each of the flip-flops shown comprises two magnetic amplifiers; these amplifiers can either be connected in cascade to form a chain, or in parallel as explained below. Further, as one embodiment of" this invention illustrates, a passive element may be substituted for one of the magnetic amplifiers so that the flip-flop will comprise only one magnetic amplifier. However, in each of the flip-flops described herein, two inputs are provided therefor labelled set and restore. The presonce or absence of a potential at the output of the flip-flop indicates to which of the two inputs a signal, indicative of the occurrence of a condition, was last applied. 7

As disclosed in our parent application, amplifiers of the 3,188,481 Patented June 8, 1965 type utilized here in the flip-flop circuits may employ form-magnetic materials. Such materials may exhibit a hysteresis loop and in conjunction with a coil of wire display a high impedance when operating over the portion of the loop from minus residual flux density to plus residual flux density and show a low impedance when travelling from plus residual flux density towards plus saturation flux density. Use can be made of these effects for signal translating and amplifying purposes. A way of using this effect is to produce the desired output when and While the core occupies the high impedance portion of its hysteresis loop. The present invention covers devices, particularly flip-flops, employing magnetic amplifiers exhibiting this effect. These amplifiers may be conveniently referred to as parallel signal translating or employing devices.

Accordingly, it is an object of this invention to provide a new magnetic apparatus.

Another object of this invention is to provide a novel combination of magnetic amplifiers to form a bistable device.

Another object of this invention is to provide a novel combination of a magnetic amplifier and a delay element to form a bistable device.

Another object of this invention is to provide a new signal translating apparatus to be used as a flip-flop.

Another object of this invention results in the provision of a bistable device utilizing magnetic amplifiers as a basic component thereof.

Yet another object of this invention results in the provision of a bistable device which is both inexpensive to construct and which exhibits considerable ruggedness.

Other objects and advantages of the invention will become apparent from the following description and the accompanying drawings, in which:

FIGURE 1 is a diagram of an idealized hysteresis loop;

FIGURE 2 shows a basic circuit of a solid-state signal translating device;

FIGURE 2a illustrates the operating time cycle for the embodiment of FIGURE 2;

FIGURE 3 illustrates some representative output wave forms;

FIGURE 4 shows an input winding with a constant current input;

FIGURE 5 shows an input winding with a constant voltage input;

FIGURE 6 shows an input winding to be used in connection with the application of a constant current and the use of diodes and blocking pulses;

FIGURE 6a represents a first operating time cycle for the circuit of FIGURE 6;

FIGURE 6b represents a second operating time cycle for the circuit of FIGURE 6;

FIGURE 60 represents a third operating time cycle forthe circuit of FIGURE 6;

FIGURE 7 illustrates an input winding to be used in connection with the application of a constant voltage;

FIGURE 7a shows the form of pulses to be applied to the circuits of FIGURE 7;

FIGURE 8 illustrates the three windings of a magnetic signal translating device to which D.C. power may be applied;

FIGURE 8a shows the pulse forms to be used in connection with the arrangement of FIGURE 8;

FIGURE 9 illustrates an arrangement in which the output is directly connected to the power Winding;

FIGURE shows a wave form which serves both as a power pulse and as a blocking pulse;

FIGURE 10 exemplifies the circuits of a single coil magnetic signal translating device;

present or not.

FlGURE'll gives a block diagram of a first signal translatingsystem to be used for flip-lop effects;

FIGURE 11a represents the schematic diagram for the circuit of FIGURE ll;

FIGURE 11b illustrates the power'waves and blocking pulses to be applied to the circuit of FIGURE 11a;

FlZGURE 11c gives a block diagram of a second signal translating system to be used for'flip-flop effects;

FIGURE 11d represents the schematic diagram for the circuit of FIGURE 11c;

FIGURE lle shows a third flip-flop arrangement in schematic form;

FIGURE 11 illustrates the power waves and the blocking pulses to be applied to the circuit'of FTGURE lle;

.FIGURE 11g shows a fourth flip-flop arrangement in schematic form; and I FIGURE 11h illustrates the power waves and blocking pulses to be applied to the circuit of FIGURE 11g.

It is to be understood that the invention is not limited to any specific geometries of the cores nor to any specific materials therefor, and that the examples given are illustrative only. The only requisite is that the material possesses a hysteresis loop preferably approaching the idealized hysteresis loop as shown in FIGURE 1.

Before describing the signal translating devices, the

terms to he used in regard to different kinds'of electric pulses will be efined. There are clock pulses and signal pulses. The signal pulses carry information and are, therefore, selectively applied. It depends upon the information to be transmitted whether such pulses are The clock pulses are automatically applied and do not carry any information. They may be subdivided into power pulses and blocking pulses. The

power pulses usually supply the power for the operation U of the signal translating device or, at least, open a gate to permit another source to operate the signal translating device. The blocking pulses blockthe interference of the power pulse withthe signal input circuit and/ or of the signal input circuit with the power circuit.

I FIGURE 2 illustrates the basic arrangement of parts of a solid-state magnetic signal translating device. Part C is a core of ferromagnetic material. Winding I is the power winding, winding II is the output winding and winding H1 is input winding. Power pulses are applied to winding 1 at, for example, terminal B. The solid arrow at terminal B indicates the direction of current of the power pulse. The solid arrow above core Cindicates the direction of flux that this current causes in core C. A typical shape of the power pulse versus time is shown in the wave form of FIGURE 2a to the left of terminal B. This power pulse causes a current to flow in the load resistor R in the direction shown by the solid arrow near winding 11. The power pulse also causes a current to flow in winding III in the direction of the dotted arrow shown at terminal A. When a signal pulse is applied to terminal A of the signal winding, a current is made to flow in the signal winding in the direction of the solid arrow shown near terminal A. The wave form of FIGURE 2a to the left of terminal A is a typical wave form which might be applied to terminal A. The vertical lines connecting the wave forms of FIGURE 2a indicate the time relationship between the signal input pulse, which may or may not be present at terminal A, and the power pulse which occurs at terminal B.

The idealized EH loop of FlGURE 1 is a convenient means for describing the method of operation of the signal translating device. First, it will be assumed that there are no information pulses and that the power pulse is in such a direction as to drive core C from plus B to plus B In this event, there is a small flux change in the core, and hence an output voltage will be generated which, as a rule, is short in duration and, in the case of some materials, also small in amplitude (sneak pulse).

FIGURE 3 shows representative output wave forms.

Wave forms X and X are the types which would occur I in the case just discussed, namely in the absence of an power circuit inductance, eddy current phenomena in the core, distributed capacitances of the winding, etc.

Now, however, it will be assumed that an information pulse has occurred preceding the power pulse. When the preceding power pulse returned to 0, it left the core in the plus B position. The information pulse causes the material to travel from plus B to minus B in a counter-clockwise direction around the hysteresis loop. There is a large change of flux. Any currents which tend to flow in circuit ll, the load circuit, are blocked by the diode D. Therefore, the only power which must be supplied from the information pulse is that power required to move the core from plus B to minus'B and the power transferred to circuit 1, the power circuit.

' Effective means have been found to block power trans-' fer to the power circuit,v as will be explained hereinafter. Therefore, the only power consumed from the signal input circuit is the power absorbed by the core in moving from plus B to minus E in the given time. After the period of time'allotted to the signal pulse, the power pulse occurs and the core now starts from minus B and proceeds to plus B The core undergoes a large flux change and a large voltage is induced in winding ll.

Curve Y, FIGURE 3, shows a representative output voltage versus time curve obtained when the material is operated between minus B and plus B The length of the output signal approximately equals the duration of the power pulse. Note that the current induced, which is in the direction of the solid arrow at winding II,

FIGURE ,2, is in the direction which will pass through the diode D. a

The power delivered to the load may be many times larger than the power required of the information pulse. A net power gain is, therefore, obtainable in the signal translating device. Many factors influence the amount of power obtained. One of the most important factors, however, has to do with the extent to which the unwanted pulse known as the sneak pulse and shown at X or X in FIGURE 3, may be tolerated in any practical situation. Another important factor is represented by the ratio of the slope on the steep portion of the hysteresis loop between plus B and minus B to the slope of the flat portion of the hysteresis loop between plus B and plus B A material with arectangular hysteresis loop is desirable for this signal translating device, although by no means completely necessary.

Thus, the fundamental method, of operation of this translating device has been shown. The following outputs will result upon the occurrence of a power pulse depending upon whether information pulses had been applied or not. When no information pulses are applied, the material goes from plus B to plus B and returns to plus B only a sneak pulse as X or X in FIGURE 3 results across R When a signal pulse has been received, the material moves from plus B to minus B an output as Y in FIGURE 3 results across R and the material returns to plus B Thus, the desired output signal occurs when and while the material travels within the steep middle portion of the loop where the permeability is at its greatest. V

A signal translating device operating in the manner just described will be designated hereinafter as. an amplifier. It should be understood, however, that the use of the term amplifier is not confined to cases of actual amplification, but extended to cover all devices which produce the desired output signal in response to the application of an input signal, regardless of the fact that the power, current or voltage ratio may be greater than, equal to or less than unity. If, in contrast thereto, the desired output signal is produced in response to the nonapplication of an input signal, then the device will be called a complementer.

It also should be realized that the device illustrated in FIGURE 2 as all the other devices described hereinafter operate as so-called parallel magnetic amplifiers or complementers. This means that the load circuit or circuits are arranged in a parallel relationship to the core when viewed from the power source, the power being supplied, in the average case, by a constant current source. The desired output signals are produced, therefore, through changes in the residual flux density which, as a rule, follow the path of the hysteresis loop and keep the core within the high permeability region, i.e., between plus and minus B In FIGURE 2, the load on circuit II is shown as a resistor. However, this might very well be any passive or active network including resistors, capacitors, inductors, any conceivable combination thereof, computing circuits, buffers, gates and other amplifiers.

In the wave forms illustrated in FIGURE 2a, the power pulse is shown occurring coincident with the end of the signal pulse. The time period t marks the beginning of the. signal pulse, t marks the end of the signal pulse and the beginning of the power pulse, and t marks the end of the power pulse. Actually, t t and t mark the boundaries of the periods allotted to the signal and power pulses and by no means indicate the length of these pulses. The period t to t may be a relatively long time as, for example, one minute, and the actual signal pulse may have a duration of one microsecond. This one microsecond can occur at any time during the one minute period allotted to the signal. The power pulse, since it always occurs, is given a period equal to its duration. Its duration may be either greater or less than the actual duration of the signal pulse, and it may be applied at anytime after the signal pulse. Therefore, this amplifier may also serve as a memory or a delay device. In View of the fact that the power pulse is derived from a source whose wave form can be accurately fixed, output pulses from this amplifier are of standard wave forms as determined by the power pulse source. This amplifier serves also, therefore, as a pulse former and pulse timing device.

In some instances, it may be desirable to obtain the amplifier information at some time which is not necessarily fixed. In this case, pulses applied to coil I may also be selectively controlled information pulses. Then the amplifier functions as a delayed gate. The information pulse applied to coil III selectively allows an output to occur when such output is selectively called for by an information pulse on coil I. In FIGURE 2, the amplifier is shown with one signal input, one output and one power winding. Actually, a signal amplifier may have many signal input, output and power windings. Thus, it is possible for the amplifier to be operated by one of several sources and/ or to operate several loads. These sources and/or loads can have different impedance and voltage levels and different polarities. The number of turns on the various windings would be adjusted to match the characteristics of the particular circuit.

Several input circuits will now be shown to handle the various problems which arise in operating this type of solid-state amplifier with both constant current and constant voltage sources. It should be stressed, in this connection, that the power pulse applied to coil I (the power winding). may, preferably, be taken from a constant current source.

A constant current source is theoretically a source of infinite impedance. A constant voltage source is theoretically a source of zero impedance. These definitions ar idealized and are merely used to obtain a simplification in the analyses of circuits. From a practical point of view, the constant current source is a source whose impedance is comparatively high with respect to the load, and a constant voltage source is a source whose impedance is comparatively low with respect to the load.

FIGURE 4 represents a constant current input source which can be used with this type of amplifier. The portion of the core C shown corresponds to coil III of FIG- URE 2. The directions of the currents, voltages, and fluxes shown are the same as those in FIGURE 2. Normally, when no signal is applied to terminal A, terminal A is at a small negative potential such that the potential on the plate of diode P is zero, and the current from the constant current source S flows through the diode P in series with A, and no current flows through coil III. In order to relax the tolerance requirements on this negative voltage, a diode Q may be inserted as shown in series with terminal A If Q is present, the small negative voltage may be larger and diode Q will cut oil. Reverse current will thereby be prevented from flowing in coil III. When an input is desired, a positive pulse is applied to terminal A; the diode P, in series with A, cuts off; and the current which formerly flowed through A now liows in coil III in the direction shown by the solid arrow. This principle is also applicable to the means for producing the power pulse. In this case, the actual power pulse would be the DC. source of constant current and the source of switching pulses which cause this current to flow in coil III at the required time.

FIGURE 5 shows a constant voltage type of input in which the signal source S is theoretically an impedanceless source. The same portion of the core C as in FIG- URE 4 is shown here. Z is the internal impedance of a practical source and Z is an impedance placed in series with the input coil III of the amplifier. The signal source S is selectively actuated to apply an input pulse. By placing a capacitor, shown dotted, across Z a faster change in current can be obtained.

In the previous descriptions, both the signal and thev power pulse were shown as square waves. In practice, many wave forms are possible. It is essential, however, that the signal pulse, if selectively applied, is present during the signal period. Whether or not this signal impulse may extend into a power pulse period, depends upon the characteristics of the other elements in the overall circuit system within which this amplifier is to be used. If the time integral of the signal voltage during the signal period is equal to or greater than 2X10 B AN volts (where A is the area of the magnetic circuit in square centimeters, B is in gauss and N the number of turns), then full 0utput is obtained from the amplifier. If, on the other hand, the time integral of the signal voltage is less than 2X10 B AN volts, an output proportionately smaller than the full output will be obtained. This efiect may be used to make a lower power amplifier without decreasing the volume of magnetic material present. Therefore, it is not necessary, and indeed may not be desirable, that the amplifier operate with the full excursion between plus B and minus B as stated hereinabove.

One of the important problems connected with these amplifiers is the method of preventing power pulses from delivering energy to the signal input winding and the method of preventing the signal winding from delivering energy to the output winding. Several methods or combinations of methods can be used. One simple case occurs when the power winding is connected to a high impedance source. In this case, the high impedance itself prevents energy transfer from the signal to the power winding. Various combinations of diodes and blocking voltages can also be used on both signal and power windings.

FIGURE 6 is an example of how diodes and blocking pulses can be used to isolate the power winding from the input or the input from the power Winding, whenever a constant current source is used for the input winding. (In the case of coil I (the power winding), the applica- 'ing this result.

- URE 2, are shown.

at point A tion of a constant'current source may be regarded as a rule.) The portion of core C containing the input winding as in FIGURE 2 is redrawn in FIGURE 6. A similar arrangement may be used for the power circuit, but the diode corresponding to diode P would not be necessary in such a case, provided that the point corresponding to point S is connected to a device which prevents any backfiow of current. The wave forms applied in one method of using this principle are shown in FIGURE 6a. The pulse applied to the power winding is shown. At the same time, a positive pulse is applied to point A from a blocking source. This cuts off the diode Q in series with A and prevents flow of current which, as a result of transformer action, would try to flow as shown by the dotted arrow. The blocking pulse hasthe same or greater duration as the power pulse and sufficient amplitude to prevent the flow of current. At some later time, as previously described, a signal pulse is applied to point A. FIGURE 6b shows an alternate method for accomplish- Here the blocking pulse is applied to the point A and the signal to point A in this case, the

polarities of both the blocking pulse and the signal are negative.

shown in FIGURE 60. The power pulse is the same as previously described. Now, however, a wave form as shown in the second line is applied to terminal S. This wave form is called the block and signal supply because it is of the correct polarity to block during the power pulse period, and it can supply power to the signal wind ing in the event that a wave form, as shown in the last line, appears at point A. Point A would be grounded in this case, and diode P may be eliminated.

FlGURE 7 shows a method of isolating the power pulse from the input when using a constant voltage source. Here again only coil Ill and part of core C, as in FIG- A power pulse is applied as shown in FIGURE 7a. During the period of the power pulse, a blocking voltage from a low impedance source is applied This acts to cut off the diode F in series with terminal A and prevents current from flowing in the direction of the dotted arrow. This is the direction in which the power pulse would tend to make the current flow. A signal pulse as shown in the bottom wave form of FIG- URE 7a is selectively applied at point A. I

FIGURE 8 shows both DC. power sources and blocking pulses which can be used on both power and signal windings in an amplifier. A power pulse is applied as areas-st URE 10. This amplifier has a constant current applied shown at point B and the constant current from S which V normally would'fiow to B, is made to flow through coil I. Similarly, a blocking voltage is applied at point A During the signal period, a positive signal pulse is applied to termnal A and the current from S, which normally would flow through A, is made to flow through coil III. A positive blocking voltage is applied at point B Note that if a signal pulse does not occur, the block is applied anyhow so'that the signal source does not have to supply power required to block. The application of the block in no way harms the operation of the amplifier.

In the preliminary description of the operation of the amplifier, the output winding was shown as a separate winding II of FIGURE 2 and other figures. However, it is not necessary that this be so. The output may be connected as shown in FIGURE 9, i.e., across the power winding I with the diode D in series with the load R The input and output wave forms are the same as shown before. The previously discussed principles, for example, those of FIGURE 8, can be still applied to this circuit. A block such as applied at B FIGURE 8, can also be applied at B FIGURE 9. A power pulse can be applied at B, FIGURE 9, or if terminal Bis eliminated, it can be applied at point S as described in connection with FIGURE 6c. The power pulse applied at B may also serve as a blocking pulse if it is allowed to go negative via resistor R During the power period, when the power input has a positive pulse applied thereto, diode D cuts oli and current flows through resistor R the amplifier coil and diode D in series, and through diode D and the load resistor R Assuming that there has been no signal input, the core will be at plus B flux density, when the power pulse arrives, and will travel from plus B to plus E and there will be only a small voltage across R andonly a sneak output pulse will result.

During the signal input period, a negative pulse is applied to the power input. Diode D will connect, and point A will be at the potential of the negative pulse applied to the power input. Diodes D and diode D will disconnect, and no current will flow through the amplifier coil. If a signal input is applied at this time through capacitor F, diode D will connect, and a current will flow through the amplifier coil in the reverse direction, driving the core from plus B fiux density to minus B flux density. Then, during the next power pulse, the core will travel from minus B to plus B and a large output will result.

A voltage gain may beobtained from this amplifier by connecting diode D 'to point B instead of point X as shown. In this case it will require less voltage (although more current) to reset the amplifier from plus B to minus B i I FlGURE 11 shows a method of using amplifiers of the type described in connection with FIGURES 8 to 10 for flip-flop efiects. An input signal enters amplifier A through butter B The signal is amplified and an output signal is obtained through buffer B At the same timeas buffer B transmits a signal, amplifier A receives the output from amplifier A During the next power period,

amplifier A produces an output signal which is applied to amplifier A through gate G and bufier B1. The output of amplifier A is buffed through B into the output.

Thus, a steady output is obtained by bufiing the outputs of amplifiers A and A Either one of the amplifiers A or A is always operating, and the flip-flop is set as long as either one operates, and accordingly outputs could be taken at the output terminal of either amplifier A or A alone. The circulating loop must be broken, if and when it is desired to restore the flip-flop, and the gate G is provided for this purpose. If a restore or inhibitory signal is applied to gate G at the time that amplifier A is delivering an output, no further output will be obtained after the output delivered by amplifier A has disappeared, and the flip-flop will have been restored. however, gate G is located at the input to amplifier A and the restore or inhibitory signal is applied when amplifier A is delivering an output, the inhibition must last until amplifier A has delivered its output, and the fiipflop will restore only after amplifier A has completed its output. In order that the flip-flop might be restored as rapidly as possible, an inhibitory gate o'perated'by the restore pulse could also be placed on the output line. For fastest operation, it would be desirable to have a' restore gate at the input to amplifier A the input to amplifier A and the output. 7

FIGURES 11a and 11b show a schematic diagram of this flip-flop arrangement and the applied power waves and blocking pulses, respectively. I

As shown in FIGURES 11a and 1111, the two amplifiers A and A are controlled from a pair of phase opposed power pulses PP and PP The output of amplifier A is buffed through diode D to the input winding of amplifierA and through diode D to the output load R The output of amplifier A is also bufied through diode D to the output load R and through feed back line F to the cathode of diode D in the inhibit gate G.

p In operation, when the flip-flop has been restored, neither magnetic amplifier A or A produces an output signal and the voltage across the output load R is low. Application of a positive set signal to the set terminal (anode of diode D causes amplifier A to switch from positive remanence +B to negative remanence B as previously described. The next power pulses (PP applied via diode D to magnetic amplifier A causes that amplifier to experience a flux change as the'magnetic core thereof is switched now from negative remanence B to positive +B Asa consequence of this change in flux the magnetic amplifier A produces a positive output voltage pulse (across its upper winding) which is applied via diode D to the input winding of magnetic amplifier A and via diode D to the common output line connected to load R;,. In response to a voltage pulse applied at its input winding amplifier A will also produce a positive output voltage pulse when the positive portion of the power pulse (PP FIGURE 11b) is applied thereto. The positive output pulse produced by amplifier A isdeveloped across load R and is applied via line F to the cathode of diode D in inhibit gate G. This positive pulse is transmitted through gate G (assuming a negative restore pulse is not applied to gate G at diode D to the input winding of amplifier A where this pulse, in a manner similar to the set pulse applied at diode D causes amplifier A to produce another output pulse. Thus, a continuous flow of output pulses will be circulated through the ring comprising amplifier A amplifier A and gate G. However, when a negative restore pulse is applied to gate G at the cathode of diode D any positive output pulse applied to the input of gate G, at diode D will be inhibited; that is, will not be transmitted therethrough. Therefore, the application of the restore pulse stops the recirculation of pulses through the ring just described and the flip-flop will be in the restored condition again.

The circuit illustrated in the block diagram of FIGURE 11c and the schematic diagram of FIGURE 11d difiiers in substance from the circuit of FIGURES 11 and 11a insofar as only one amplifier is employed. Circuit elements of FIGURE 11d having the same function as circuit elements of FIGURE 11a bear the same identifying number. Here any well-known pulse delay device may be used to delay an output pulse from the single amplifier for the period of the power pulse applied to this amplifier. At the end of the delay period, the output from the delay device is butfed into the output line and also placed on the input to the amplifier. Thus, a steady output is obtained following the application of an input or set signal, and this output is continued until a restore signal is applied to gate G to inhibit the output from the delay device from reaching the input to the amplifier.

Again, in this embodiment of the invention, the output of amplifier A and delay element D need not be buffed together since the output of either of the elements alone would indicate the state of the flip-flop.

Note should be taken that, in addition to the substitution of delay element D for amplifier A other small difierences exist between FIGURE lid and FIGURE lla. To be sure, these changes are of the design type. For example, in FIGURE 11d the polarity of diode D has been reversed but so has the polarity of the restore pulse applied thereto. With the exception of delay element D, these two circuits are substantially electrically and log- .ically identical.

Two other circuits may be used for flip-flop effects, as shown in FIGURES lle and 11g. The wave forms at the various points in these circuits are shown in FIGURES 11] and 11h, respectively. Both of these circuits will allow the flip-flops to be set or restored with a single pulse that may occur during the signal period for either amplifier.

FIGURE lle illustrates a flip-flop comprising two three-winding amplifiers A and A with the set signal applied to both inputs thereof in parallel.

In FIGURE lle the convention used in FIGURE 8 will follow, that is, power pulses are applied to power pulse windings I, positive signal pulses are applied to input windings III, and outputs are developed across output windings Has the core of the particular amplifier involved traverses its hysteresis loop. It will be observed from FIGURES lle and 11 (first two lines) that two sets (PP and PP of oppositely phased power pulses are employed; power pulse PP being applied to winding I of amplifier A via diode D and power pulse PP: being applied to winding I of amplifier A via diode D An output from winding II of amplifier A is coupled via diode D to a common feedback line F as well as to load R In a similar manner, an output from amplifier A is coupled to the same feedback line F and load R via diode D Feedback line F connects the outputs of amplifiers A and A back to the respective input circuits; that is, via diode D and D to one end of winding III of amplifier A and via diodes D and D to a similar end of winding III of amplifier A Diode D 'which is connected to the anodes of diodes D and D couples the selectively applied set signal (FIGURE 11;, fifth line) to the same end of both aforesaid input windings III. The selectively applied restore pulse is coupled via diodes D and D to the remaining end of input windings III of amplifiers A and A respectively. Blocking pulses 1 and 2 which are oppositely phased (see FIGURE 11 lines 3 and 4) function, as previously stated,vto prevent current flow in the input windings III of an amplifier when the power pulses are applied to the power pulse windings I thereof. Blocking pulses 1 and 2 are coupled to the lower ends of windings III of amplifiers A and A via diodes D and D respectively.

In operation, one or the other of the blocking pulses 1 or 2 will always be at zero potential (FIGURE 11 A selectively applied set input signal will always appear during the signal period of one or the other of the amplifiers A or A The particular amplifier receiving a set signal during its signal period will produce an output simultaneously with the arrival of the next po'sitive power pulse applied thereto. This output signal is returned to the common input through diode D and will continue to set the alternate amplifiers A or A with every such pulse. Thus, a continuous output signal is produced from this flip-flop after having received a set signal.

For example, a single set signal applied when the power pulse PP is positive; power pulse PP is negative; blocking pulse 1 is positive; and blocking pulse 2 is at zero potential (a condition which will exist simultaneouslysee FIGURE 11 will cause amplifier A to produce a positive output signal across winding II thereof in synchronism with the next positive portion of power pulse PP This output signal is buffed back to the input windings III of amplifiers A and A via line F diode D diode D and diode D The regenerated signal arrives at a time when power pulse PP is negative; power pulse PP is positive; blocking pulse 1 is at zero potential; and blocking pulse 2 is positive. Accordingly, amplifier A in the mode of operation already described, will be affected by this regenerated input pulse and in synchronism with the next positive portion of power pulse PP produces a positive output signal across its output windings II. This positive output signal is fed back to the inputs of amplifiers A and A as previously described, and consequently thereafter these amplifiers will produce positive output signals across their respective output windings II, in alternation.

In order to stop the endless recirculation of signals, that is, to change the state of this flip-flop, a restore signal is applied to signal windings III of amplifiers A and A simultaneously via diodes D and D The restore signal is a positive pulse (see FIGURE 11 line 6) and serves first and second signal sources, means coupled to said amplifiers for rendering said amplifiers operable in alternapositive restore signal is applied to the other ends of windings III in each of the a'mplifiers'A or A and accordingly will inhibit the effect of the positive feedback signal to said windings III by making the ends thereof have a samepotential, or by blocking diodes D and D depending on the magnitude of the restore signal.

FIGURE 11g shows basically the same arrangement as FIGURE lle, but for a center tapped transformer T which is to apply the blocking pulses to both amplifiers from a The transformer has a voltage of 7 single supply source. 2E volts peak to peak, and since the center tap of the transformer is returned to 0 volt, the blocking voltage applied to each amplifier is plus E. The restoring voltage is applied to the center tap of the transformer and thus blocks both input circuits. v

The wave forms for this flip-flop are shown in FIGURE 11h. Its operation is the same as that described for the flip-flop of FIGURE 11g with the exception of the manner of applying the blocking pulses, and hence will not be described again. ing pulses, that the transformer shown in the center of FIGURE 11g applies a pulse in alternation to each of the signal windings III of amplifiers A and A which prevents the passage of current therethrough when the amplifier concerned receives the positive portion of the power pulse at its winding I.

Having thus described our invention, we claim:

1. In combination, first and second magnetic amplifiers having a common input and a common output conductor,

Sufiice it to say, in regard to the block- I tion, wherein said first signal source is connected to said common input conductor, the common output conductor of both amplifiers is connected to said common input condoctor, and said second signal source is connected to both amplifiers to supply signals rendering said common input inoperative on both amplifiers simultaneously.

2. In combination, first and second magnetic amplifiers having a common input and a common output conductor, first and second signal sources, means coupled to said amplifiers for rendering said amplifiers operable in alternation, a blocking pulse generator connected to both am- 1 plifiers to supply blocking pulses alternately to each of 7 said amplifiers for rendering the inputs of said magnetic amplifiers inoperable in alternation, wherein said first signal source is coupled to said common input conductor, the common output conductor from both amplifiers is connected to said common input conductor, and said second signal source is connected to both amplifiers to supply signals rendering said common input for both amplifiers inoperative simultaneously.

3, The combination according to claim 2 in which said blocking pulse generator comprises two independent sources. o

4. The combination according to claim 2 in which said blocking pulse generator comprises a common source connected to the primary winding of a transformer, the secondary winding of said transformer having a center tap which isconnected to said second signal source.

No references cited.

IRVING L. SRAGOW, Primary Examiner. 

2. IN COMBINATION, FIRST AND SECOND MAGNETIC AMPLIFIERS HAVING A COMMON INPUT AND A COMMON OUTPUT CONDUCTOR, FIRST AND SECOND SIGNAL SOURCES, MEANS COUPLED TO SAID AMPLIFIERS FOR RENDERING SAID AMPLIFIERS OPERABLE IN ALTERNATION, A BLOCKING PULSE GENERATOR CONNECTED TO BOTH AMPLIFIERS TO SUPPLY BLOCKING PULSES ALTERNATELY TO EACH OF SAID AMPLIFIERS FOR RENDERING THE INPUTS OF SAID MAGNETIC AMPLIFIERS INOPERABLE IN ALTERNATION, WHEREIN, SAID FIRST SIGNAL SOURCE IS COUPLED TO SAID COMMON INPUT CONDUCTOR, THE COMMON OUTPUT CONDUCTOR FROM BOTH AMPLIFIERS IS CONNECTED TO SAID COMMON INPUT CONDUCTOR, AND SAID SECOND SIGNAL SOURCE IS CONNECTED TO BOTH AMPLIFIERS TO SUPPLY SIGNALS RENDERING SAID COMMON INPUT FOR BOTH AMPLIFIERS INOPERATIVE SIMULTANEOUSLY. 